The chip contains internal PLL circuitry, so all timing control signals, including the system clock, are synchronized with the horizontal flyback signal.
该芯片包含内部PLL电路，因此所有的时序控制信号，包括系统时钟，与水平回扫信号同步。
AT89S52 MCU is the core of this design, and it realizes by controlling the clock chip DS1302. It has the fuctions of timing and so on. Besides, it's very precise. and it cannot lose its digital when it power out.
本设计是以AT89S52单片机为核心，并且通过对时钟芯片DS1302的控制来实现，有计时和倒计时功能，而且时间精度较高，有掉电不丢失功能。
The clock is based on AT89S51 single-chip microcomputer and provided with the function of displaying the year, month, day, week, hour, minute and second, announcing the hour on integral point musically and timing clock in fixed time.
该时钟具有年、月、日、星期、时、分、秒显示和整点音乐报时及定时闹钟等功能，也可作电子秒表使用。
G-M tube and Hall effect integrated chip have been originally used to determine the β rays emitting time and their timing errors have been predicted based upon the analysis of the timing methods and timing point for the forming of ion cloud and the arrival of ion cloud at the collecting plate.
讨论了离子团生成时刻的定时方式及定时点的确定，对用G-M管及霍尔效应片定时的误差进行了实测分析；依据离子团的收集过程分析，给出了收集极上定时点确定的根据。
Single-chip timing procedures, can simulation of electronic clock, quite stable.
单片机定时程序，可以仿真电子时钟，相当稳定。
This feature eliminates complex off- chip write pulse generation and provides increased timing flexibility for incoming signals.
此功能消除了复杂的片外，并提供代写脉冲输入信号的时间增加了灵活性。
Thesis analyse data collector link that live in among inertia navigation system at first, whether according to function and parameter index of realization its, provide each principle and application of link that design originally. Chapter two provide the principle and application of V/F converter, chapter three provides the function and function of the chip 8254, chapter four provide the timing of one-chip computer 8051 and cut off the function and application in the design.
论文首先分析了数据采集器在惯性导航系统中所处的环节，然后根据其实现的功能和参数指标，给出本设计的各个环节的原理及运用：第二章给出了V/F转换器的原理及运用，第三章给出了芯片8254的作用及功能，第四章给出了单片机8051的定时及中断功能及在设计中的运用。
First, plenty of X-ray spectrum measurement documents and materials were analyzed and compared in order to prove our scheme theoretically; Second, the CMOS devices were the key parts for filtering, amplifying and Max Amplitude Detecting of the detecters`analog outputs; Third, the low power assumption and fast A/D devices were chosed to implement the 4096 channels detecting; Fourth we not only designed the timing control of sytem circuit, but also completed the control of the Max Amplitude Circuit based on the CPLD; Fifth, in order to complete high-speed data transfer between the PCI local bus and Double Ram, the PCI bus with PCI 9030 chip was our first choice.
首先，论文对X光探测及其测量系统作了大量的文献调研，在理论上保证了整个方案的可行性；其次，采用CMOS器件对探测器输出的模拟信号进行滤波、放大、峰值甄别处理；第三，根据脉冲信号的幅频特性，选择低功耗高速的A/D器件，实现X光谱的4096道测量；第四，利用CPLD芯片和Quartus II 软件，设计并实现了整个硬件电路的时序控制，并且实现对幅值电路的控制；第五，利用PCI9030的特性，设计了PCI总线，实现PCI局部总线与双口RAM之间数据的高速传输。
In the last part of this paper, it introduces the methodologies of static timing analysis and formal verification in order to reduce the cycle of chip design. It also introduces the methodologies of physical verification, such as DRC, ERC and LVS in order to improve the ratio of successful taping out.
另外，在论文的最后章节部分还讨论了缩短芯片设计周期和提高芯片生产成功率的验证方法，如采用静态时序方法和形式化验证技术来减少芯片的验证时间，采用DRC、ERC和LVS等物理验证方法来提高芯片生产的成功率。
This paper introduces the ISD4003 voice chip features, technical characteristics, methods of operation, timing, etc.
本文介绍了语音芯片ISD4003的功能特点，技术特性，操作方法，变成时序等。
We designed the driven-pulse generator module whose focusing delay, pulse width, pulse repetition frequency can be dynamically controlled by pre-computed codes. Also we achieved linear scanning control and probe impulse control and function code storage and other system functions both in a signal FPGA chip. Both the function simulation and timing simulation results of this sub-system show that it lays a good foundation on building high speed, high precision, fully digitalized, highly integrated modern medical ultrasonic diagnostic equipments. This paper will help to the researching and producing process. It is fresh air to the biomedical electronics, medical instrument, and medicine ultrasonic.
在单片FPGA 芯片内部设计实现了聚焦延时、脉宽和重复频率可动态控制的发射驱动脉冲产生器、线扫控制、探头激励控制、功能码存储等功能模块，功能仿真和时序分析结果表明该子系统为设计实现高速度、高精度、高集成度的全数字化超声诊断设备打下了良好的基础，将加快其研发和制造进程，为生物医学电子、医疗设备和超声诊断等方面带来新思路。
The main contributions and innovations of this dissertation are as follows:(1) It uses the FPGA based on the SOPC of Nios II CPU to implement the control logic, interrupt service, timing output and I/O extension. Using FPGA instead of discrete components such as MCU, off-chip RAM and CPLD, increases the density of system integration, speeds up the whole monitored control sub-system and makes the sub-system work flexibly.
本文的主要创新工作有：1 使用基于Nios II 嵌入式处理器的SOPC实现雷达监控分机，即以高速的单片FPGA替代传统监控分机中CPLD和单片机实现了外围芯片的控制逻辑、时序转换、中断响应、I/O接口扩展等功能；拥有更高的集成度、更快的监测数据更新速度、更灵活的监控能力以及较小的体积和功耗。
Apart from the above two modules Scaler chip also includes some auxiliary parts such as the Display Timing Generator module and the microprocessor I/O module.
除上述两个模块，定标器芯片中还包括输入模块、显示时序控制模块、微处理器接口模块等辅助模块。
The hardware design and the main use of PC ES598PCI STAR in the experiment box programmable timing/counter, programmable 8253 parallel interface chip 8255, 8259, programmable interrupt controller of the keyboard/8279 display Settings, 7 digital luminescence tubes, intercom, components, such as the basic control circuit.
硬件设计主要使用PC机和STAR ES598PCI实验箱中的可编程定时/计数器8253，可编程并行接口芯片8255，中断控制器8259，可编程设置型键盘/显示器8279，七段数码管，发光管，蜂鸣器等组成基本控制电路。
This system makes the control unit and timing unit designed on one chip. It simplifies the circuit, improves the stability of the system and has good portability.
该系统避免了控制单元与时序单元的分立设计，简化了电路，增强了可靠性，具有较好的可移植性。
The system uses 8031 single chip microcomputer as controlling and data disposal part which controls LED shining in an equal interval and makes ultrasonic generator clean the U-shaped detector timing.
该系统采用了8031单片机作为系统控制和数据处理部件，控制发光二极管作为光源脉冲发光、超声波清洗器定时对光纤U型敏感元件进行清洗。
Each packet is brought to the output amplifier of the chip under control of horizontal timing.
在水平定时控制下，每个电荷包被带到芯片的输出放大器。
in order to transmit the sampled data of the wheel tread abrade to the pc terminal, the data transmission system based on usb technology is designed in this article. the timing of the sampled data stream is controlled by fpga which communicates with the pc terminal with the help of usb2.0 interface chip cy7c68013.in this article, the hardware structure of data transmission system, the software design, the working flow and firmware of the usb interface chip are systematically discussed. compared to the traditional pci bus transmitting system, this system is designed to support plug and play technology, thus it can be widely used in the portable detection for the wheel tread.
摘 要：针对车轮踏面擦伤采集的数据到pc机的传输问题，设计一种基于usb总线技术的数据通信系统。该系统利用fpga实现采集数据流的收发时序，通过usb 2.0接口芯片cy7c68013与主机进行通信。详细介绍该数据传输系统的硬件结构、软件设计、usb芯片固件设计和工作流程，该数据传输系统相对于传统的pci数据传输系统，具有简便灵活、支持热拔插技术，在便携式车轮踏面擦伤检测中可以广泛的运用。
C108 linear image sensor consists of buffer circuitry, timing generator, shift register, active pixel element array, chip selector, and on-chip differential amplifier.
C108线性图像传感器由缓冲电路、时序发生器、移位寄存、有源像素阵列、芯片选择以及内部差分放大器组成。
Timing counter, only a small section of single-chip based on the C51 process, can be achieved time and simulation time machine at the same time.
详细说明：定时计数器，只是基于C51单片机的一小段程序，可以实现机器计时和仿真计时同时进行。