It is thought over the problem of resource and frequency in this dissertation. It can get the result of 17bit and 14bit multiplication operation every four periods by using look-up table and the operation of shift and addition. An adder tree is designed to economize the hardware resource.
在设计过程中，充分考虑了资源和频率这两个矛盾体的折中，在四个时钟周期里以查找表、移位和加法运算方式得到17位与14位的乘法运算的结果。
The circuit realizes I V conversion and adder's function with only a single stage of video frequency operational amplifier.
该电路实现I－V转换和相加器功能仅用1级视频运放。
This paper introduces a method using Multiplier and adder in order to replacing A/D circuit in non-intermediate-frequency receiver.
本文介绍一种采用乘法器与加法器相结合电路替代一般零中频接收机中A/D转换电路的方法。
A processing element array and an adder tree structure are used to improve the execution speed of SAD computation. The pipeline of the PE array and the adder tree is partitioned carefully in order to increase the work frequency.
本文结构由处理单元阵列和加法树组成核心计算结构，并对其流水线进行了细致地划分，提高了工作频率和运算速度。
In the first stage, the amplitude sequence of modulating signal is generated by addressing waveform memory and added by the frequency value of carrier wave in the adder. The parallel output of the adder is served as the frequency control word of the second phase accumulator.
在第一级寻址结构中产生的调制信号幅度序列和载波频率值在加法器中相加，并将相加的结果作为第二级相位累加器的频率控制字；
This circuit include DDS which generate central frequency, five pair of low pass filter, 20 multipliers, and an adder.
该电路包括了用DDS产生的中心频率发生器、5对低通滤波器、20个乘法器和一个加法器。
Multi-CPFSK Demodulation Technology in Hopping Frequency Wireless Communication; multiple-digit decimal adder
无线跳频通信中的多进制CPFSK解调技术多数位的十进制加法器
The phase adder in the model is widely applied which could enable system to hold high frequency revolution, fast frequency switching, and easily digital modulating of the signal's phase and amplitude.
模块中的相位累加器，使系统具有较高的频率分辨率，可实现快速频率切换，很容易实现频率、相位和幅度的数控调制，有广泛的应用价值。
NC NC divider divider design of its function is when the input given different input data, input the clock signal will have different frequency than, for example 3 is to use the NC prescaler count preset value of the adder parallel counter design is completed, the method is to count the number of overflow bit with preset load to the input signal phase.
详细说明：数控分频器的设计数控分频器的功能就是当在输入端给定不同输入数据时，将对输入的时钟信号有不同的分频比，例3的数控分频器就是用计数值可并行预置的加法计数器设计完成的，方法是将计数溢出位与预置数加载输入信号相接即可。
NC NC divider divider design of its function is when the input given different input data, input the clock signal will have different sub-frequency ratio, NC prescaler value can be used include parallel preset counter adder design is completed, the method is to count the number of overflow bit with preset load to the input signal phase.
详细说明：数控分频器的设计数控分频器的功能就是当在输入端给定不同输入数据时，将对输入的时钟信号有不同的分频比，数控分频器就是用计数值可并行预置的加法计数器设计完成的，方法是将计数溢出位与预置数加载输入信号相接即可。
SCM is used to control the direct digital synthesis chips to produce four sinusoidal signals of arbitrary frequency and phase. The superposition of these signals is realized by using analog adder circuit.
利用单片机控制直接数字合成芯片，精确产生任意频率和相位的4路正弦信号，通过模拟加法电路实现信号的合成。