Another signal comparison circuit after 4511 to enter in the code decoder decoding the digital display driver SCR high temperature of Lu Shu.
另一路信号经比较电路后输入到4511编码译码器中译码驱动数码管显示温度过高晶闸管的路数。
Then we present the hardware design of RS(255, 247) encoding and decoding, including the multiplier in Galois field, the circuit for solving syndromes matrix, the circuit of Berlekamp arithmetic and so on. The use of streamline technology in the design of FPGA improved the efficiency of encode and decode system greatly.
接下来讨论了RS(255，247)编码过程和解码过程的硬件设计，包括伽罗瓦域内的乘法器设计，伴随式求解电路，Berlekamp算法电路等，在FPGA的设计过程中充分使用流水线技术，使整个编码和译码系统的效率有很大的提升。
This paper is focused on the FPGA internal logic design ideas and methods in the transmitting and receiving circuit board which composes the whole transmission system: The control implementation which includes the digital video decoder chip on the transmitting board, SRAM and the fiber physical layer transmission chip; The operation of asynchronous clock domain, display of the image restructuring and the coding technology design; image decoding in the receiving board`s FPGA, district display technology and the 24-bits parallel pixel data`s serial transmission designing.
论文着重介绍了组成整个传输系统的发送与接收电路板上FPGA内部的逻辑设计思想与设计方法：发送板上FPGA对数字视频解码芯片、片外SRAM以及光纤物理层传输芯片的控制实现，异步时钟域操作、显示图像重组与编码技术设计；接收板内FPGA的图像解码、分区显示技术以及24bit并行象素数据的串行传输方案实现。
Automatic scoring circuit, A, B with 7-segment decoding each side scoring display tubes, each divided into a Bureau of the expiration of 21, then scoring cleared, re-start a new one single game.
设置自动记分电路，甲、乙双方各用7段译码管进行记分显示，每计满21分为1局，然后记分清零，重新开始新一局比赛。
This method relative hybrid method generally have the following advantages: First, the performance can be greatly improved, because parasitic capacitance and crosstalk phenomenon can be significantly reduced; second, hybrid method requires sophisticated technology to reduce packaging Sensor Interface affected, and monolithic integration requires packaging technology is relatively simple and therefore, lower cost sensors; third, monolithic integrated sensor array sensor technology is the need to overcome the array sensor and external decoding circuit an effective interconnect bottleneck; Fourth, the development of monolithic integrated mixed development of MEMS products than MEMS products for a short time, and to develop low cost.
这种方法相对混合方法总的来说有如下优势：第一，性能能得到很大的提高，因为寄生电容和串扰现象可以显著减小；第二，混合方法需要复杂的封装技术以减小传感器接口的影响，而单片集成方法需要的封装技术相对简单，所以，降低传感器成本；第三，单片集成传感器技术也是阵列传感器的需要，是克服阵列传感器与外围译码电路互连瓶颈的一种有效方法；第四，开发单片集成MEMS产品比开发混合MEMS产品所需的时间短，而且，开发成本低。
In arranges in the decoding plan, in view of the tripping device system work characteristic, designed the unique remote control command ---40 bit serial to move the position code hardwood form and the code, and has designed the code and the decoding electric circuit.
在编解码方案中，针对翻车机系统的工作特点，设计了独特的遥控指令---40比特串行移位码的桢格式和码型，并设计了编码和解码电路。
The multi- frequencies decoding circuit plays an important part in the system. It is of reliable function, with the adoption of SPC exchanges, the radio communication equipment and the integrate circuit MT8870 DTMF acceptor which is widely used among push-phones such as fixed phones and mobile phones. The telephone switches is made up of seven modules.
双音频解码电路是系统的一个重要组成部分，采用目前在按键电话、程控交换机及无线通信设备中广泛应用的集成电路MT8870 DTMF接受器，芯片性能可靠。
The automatic decoding method locks the frequency of Morse code by phase locked logic circuit at first.
马威，张敬修，王虎帮解放军炮兵学院信息化弹药研发中心，安徽合肥 230031
The digital samp ling card was constructed by a largescale decode circuit, like 138 decoding chip and 4051 multip le analog2switch chip. Through the samp ling card, the system can obtain the whole connection information and send it to the database.
数字采集部分主要由138译码器及大量多路选择开关等逻辑电路组合而成，通过对线束点信号的置位及读取，可以获得线束的连通信息传送给计算机数据库。
the design of decoding circuit for pcm telemetry signal is introduced in the paper. the system accomplished the mission of decoding high-speed difference pcm signal received, and recording data by frame. the key to the module of 422 is how to implement serial-parallel data conversion. and the key to the module of ±2.5 v is how to achieve code-synchronization and frame-synchronization. the choice and analysis of parts of an apparatus are recommended. the circuit has applied in one test platform successfully, it has merits of stabilization and anti- jamming.
摘 要：介绍了一种遥测pcm码流解码系统的设计，系统能把接收到的±2.5 v pcm码流和422pcm码流还原出原始数据信息，按照帧结构分路存储。422码流解码的关键是串并的转换，±2.5 v pcm码流解码的关键是码同步和帧同步的实现。给出了pcm解码系统硬件电路的设计，并分别介绍了422方式和±2.5 v方式的pcm码流的解调办法。该电路设计已用于某遥测系统的地面测试台，具有工作稳定，抗干扰能力强的特点。关键词：pcm解码；帧同步；码同步；串并转换
The design of the Answer devices the use of Protel99 to complete the schematic diagram and the use of VHDL to complete the main control circuit design, including digital display circuit, countdown display and coding and decoding circuits. The ALTERA MAX+PLUS Ⅱsoftware tool was used for compilation emulation verification. The ALTERA EPF10K10LC84 was chosen in the hardware system to realize the system functions. The design of the competitive answer machine is easily expandable and provides good application results.
该抢答器的设计利用Protel99完成了原理图设计、利用VHDL完成了控制主电路设计，具有数字显示电路、倒计时显示电路、编码译码电路功能，并利用MAX＋PLUSⅡ工具软件完成了编译仿真验证；硬件选择ALTERA公司的EPF10K10LC84芯片来实现抢答器的系统功能，该抢答器具有很强的功能扩充性，应用效果良好。
The design of the Answer devices the use of Protel99to complete the schematic diagram and the use of VHDL to completethe main control circuit design, including digital display circuit, countdown display and coding and decoding circuits. The ALTERAMAX+PLUS Ⅱsoftware tool was used for compilation emulationverification. The ALTERA EPF10K10LC84 was chosen in the hardwaresystem to realize the system functions. The design of thecompetitive answer machine is easily expandable and provides goodapplication results.
该抢答器的设计利用Protel99完成了原理图设计、利用VHDL完成了控制主电路设计，具有数字显示电路、倒计时显示电路、编码译码电路功能，并利用MAX＋PLUSⅡ工具软件完成了编译仿真验证；硬件选择ALTERA公司的EPF10K10LC84芯片来实现抢答器的系统功能，该抢答器具有很强的功能扩充性，应用效果良好。
This system including carrier encode circuit, carrier transmission electric circuit, receive decoding circuit three parts of constitutions.
该系统包括载波编码电路、载波发送电路、接收译码电路三部分构成。
This system including carrier encode circuit, carriertransmission electric circuit, receive decoding circuit three partsof constitutions.
该系统包括载波编码电路、载波发送电路、接收译码电路三部分构成。
Key word: power line carrier; Hospital ward call; Encode circuit; Receive decoding circuit
要害词 电力线载波；病房呼叫；编码电路；接收译码电路
Encoding instruction decoder for decoding command signals, and finally by the drive circuit to drive the implementation of circuit operation to achieve a variety of commands.
指令译码器将编码指令信号进行译码，最后由驱动电路来驱动执行电路实现各种指令的操作。
Based on the research of the reciever chip and the time protocol, the concept and algorithm of the time signal decoding circuit design is given out.
在详细了解协议内容的前提下，提出针对于德国DCF协议的解码思想和算法。
It not only compared with those of the RS(255, 239)code and BCH(3860, 3824)+BCH(2040, 1930) code, but also analyzed and discussed the problem that the encoding and decoding of LDPC circuit design and implementation.
通过理论分析与仿真结果表明这种超强 FEC 码型具有良好的性能，可以节省硬件开销，比较适用于光通信系统中，可作为超强 FEC 码型的候选码。
In the respect of Hardware design, according to the features of the environmental monitoring data acquisition and processing: Taking DSP as the core; Analog-to -Digital Converter MAX196 complete analog signal acquisition; CPLD Logic decoding assume that the change of control functions, that the address decoder, I/O expansion, the debounce circuit of the keyboard, switches of Acquisition and Control, DSP-Multiplexed data bus and SJA1000 Multiplexed data Bus interface and conversion; CAN provide communication interface for monitoring installment and upper monitor.
硬件设计方面，根据环境监测中数据采集和处理的特点：以DSP为核心；模数转换器MAX196完成五路模拟信号的采集；CPLD担负逻辑译码、转换控制功能，即地址译码、I／O扩展、键盘抖动和重键、开关量的采集和控制、DSP的非多路复用总线和SJA1000的多路复用总线的接口转化等问题；CAN总线提供监测装置与上位机之间的通信接口。
It also has a simple decoding circuit which outperforms the hybrid coding. The decoding hardware consists of an LFSR and a small control circuit. Furthermore, the communication protocol is simple.
与混合码复杂的解压结构相比，在硬件开销上具有明显的优势，仅需一个LFSR和简单的控制电路，且通信协议简单。