It resides on the TFT-LCD panel and provides the data buffering and control signal generation for XGA, and Wide XGA graphic modes.
它驻留在TFT - LCD面板，提供了数据缓冲和控制信号代的XGA和宽幅的XGA图形模式。
The present invention provides one magnetic tape controlling driver, which includes a system I/F unit for receiving data set from the system unit and to be written to the magnetic tape; a data memory unit for storing the received data set inside buffer memory; a data transmission unit for taking data from the buffer memory and transmitting the data to the magnetic head; a buffering management unit for managing the number of the data sets in the buffer memory; a current position managing unit for managing the information relevant to the current write position on the magnetic tape; and a LEOT determining unit for determining whether to send LEOT inform to the system unit through checking the information from the buffering management unit and the current position managing unit.
本发明提供了用于接收来自主机的将被写入磁带的数据集的主机I/F单元31；用于将所述接收的数据集存储在缓冲存储器33中的数据存储单元32；用于取出存储在缓冲存储器33中的数据并将所述数据传输到磁头的数据传输单元34；用于管理存储在缓冲存储器33中的数据集的数量的缓冲管理单元35；管理与所述磁带上的当前写入位置有关的信息的当前位置管理单元36；以及用于通过检查由缓冲管理单元35和当前位置管理单元36管理的信息来确定是否向所述主机发出LEOT的通知的LEOT确定单元37。
It combinesthe advantages of forwarding based on label, such as high speed, QoS, and traffic engineering, and those of the control scheme for OBS, such as longer data unit, buffering at network edge, and outband signalling, so it has a promising application.
它把基于标签转发的速度优势、QoS 保证及流量工程与光突发包交换控制机制(更长的转发数据单元、光网络边缘缓存、带外信令控制)结合起来。
The inputs are configurable either as 64 single-ended channels or as 32 differential channels, and the input range can be software selectable as ±10V, ±5V or ±2.5V. Scan rates can be controlled from either an internal rate generator, through an external digital input, or by direct software commands. Multiple PMC-12AI64 boards can be connected together for synchronous scanning. Data buffering is accomplished through a 64K sample FIFO. Internal auto calibration networks permit calibration to be performed without removing the board from the system.
输入可以配置64的单端通道或32的差分通道，输入通过软件选择±10V，±5V和±2.5V，扫描比率控制由一个内建的比率生成器，通过外部的数据输入或通过软件命令控制，多块 PMC-16AI64板卡能连接起来进行同步扫描，一个 64K 的采样 FIFO 缓冲器提供最大的数据输入，内在的网络自动校准。
The inputs are configurable either as 64 single-ended channels or as 32 differential channels, and the input range can be software selectable as ±10V, ±5V or ±2.5V. Scan rates can be controlled from either an internal rate generator, through an external digital input, or by direct software commands. Multiple PMC-16AI64 boards can be connected together for synchronous scanning. A 64K-sample FIFO provides maximum buffering of input data. Internal auto calibration networks permit calibration to be performed without removing the board from the system.
输入可以配置64的单端通道或32的差分通道，输入通过软件选择±10V，±5V 和±2.5V ，扫描比率控制由一个内建的比率生成器，通过外部的数据输入或通过软件命令控制，多块 PMC-16AI64板卡能连接起来进行同步扫描，一个64K的采样FIFO缓冲器提供最大的数据输入，内在的网络自动校准。
The invention confirms that the data transferring to the processing chip is valid data and the message buffering in the processing chip is intact message.
本发明保证了接收芯片传输到处理芯片的数据为有效数据，处理芯片中缓存的报文为完整报文。
The communication core with a set of logic implemented the functions of coding, decoding, data buffering, message testing and command judging and performing.
数据通讯内核及其外围逻辑完成了曼彻斯特编/解码、数据缓冲、消息格式检验以及命令的解析、判断和执行等功能。
The good thing is, stream data is buffering in the memory, not on the hard disk.
该是一件好事，流数据是在缓冲记忆体，而不是在硬盘上。
Stream data is buffering in the memory, not on the hard disk.
流数据是在缓冲记忆体，而不是在硬盘上。
A alternative buffering method (ABM) is designed to realize the data share between signal collecting and storing.
设计了交替缓冲方法实现采集和存储的数据共享；
The application of the double buffering acquisition in cycle mode with DMA (Direct Memory Access) and the multithreading technique of Visual C~(+ +) for the high-speed data acquisition is described chiefly.
重点描述了采用DMA（DirectMemoryAccess）循环双缓冲采集方式和VC++6.0多线程技术将高速数据采集引入到闪光焊质量分析中的实施过程。
The functions of data latching, buffering and address switching are realized by software to save hardware costs, reduce the size of circuit board and enhance the interfacing efficiency.
本设计还采用了硬件软化技术，用软件实现数据的锁存、缓冲、地址切换等功能，既节省了硬件开支，减少印刷电路板的面积，又使接口电路通用灵活。
You may configure the amount of memory that will be used for buffering audio data during playback or record.
在回放或录音过程中，您可以配置将用于缓冲音频数据的内存容量。
NET Control includes the designs of system and database, DataWindow, DW format file, Web DataWindow control, business logic and data buffering areas.
NETControl的开发流程含系统及数据库设计、DataWindow设计、DW格式文件设计、WebDataWindow控件设计、业务逻辑设计和数据缓冲区。
Data communications system is part of the core digital presses, to complete the PC real-time image data processing, data buffering, data transmission, coordination of print head control.
数据传输系统是数字印刷机通信部分的核心，要完成上位机图像数据实时处理、数据缓冲、数据传输、协调喷头打印控制等功能。
Finally, the whole process of the multimedia data acquisition, buffering, packing and sending is introduced.
最后，系统地介绍了整个多媒体数据从采集，经缓冲和打包处理，到成帧发送的过程和实现方法。
In order to improve the efficiency of DBS, which is affected by the data I/O operations, buffering and backing up the real-time data in the memory is applied to store the real-time data.
对于实时数据的转储，采取了开辟内存缓冲区对实时数据进行备份的办法，来降低数据I/O对系统效率的影响。
The technique of spatial data buffering is the efficient method which improve the efficiency of the spatial data querying.
空间数据缓存技术是提高空间数据查询效率的有效方法之一。
On-board DSP performs conversion data buffering and communication with the host through RS232/USB2.0 interface, receiving instructions and transfer conversion data from and to the host.
板载DSP完成数据的缓冲，并通过RS232/USB2.0接口与上位机通信，接收上位机的控制命令，向上位机发送采样转换数据。
To self-designed the dual port RAM handshake protocol for the gateway device, which provides a data buffering solution.
自行设计的双口RAM控制权握手协议，为网关设备的数据缓冲提供了了解决方案。