Floorplanning and placement are key steps in modern VLSI physical design, and Simulation Annealing is widely used in floorplanning algorithms.
布局是现代VLSI物理设计中十分关键的步骤，而模拟退火等智能算法在针对宏模块布局的平面布图规划问题中得到广泛应用。
In the stage of VLSI implementation, both RTL code and netlist are fully verified. The testbench. and testcases are carefully designed to cover all possible scenarios.
在对系统进行MATLAB建模仿真后，并通过所搭建的相对完备的测试平台对其VLSI实现进行了RTL级和门级的仿真。
ABSTRACT With the widespread use of VLI, VLSI component on Printed Circuit Board, traditional logical test process is time consuming, complex, and of high cost.
随着大规模、超大规模集成电路和表面安装技术在印刷电路板制造中的广泛应用，传统的印刷电路板逻辑测试方法面临着严重的挑战。
ABSTRACT With the widespread use of VLI, VLSI component on Printed Circuit Board, traditional logical test process is time consuming...
随着大规模、超大规模集成电路和表面安装技术在印刷电路板制造中的广泛应用，传统的印刷电路板逻辑测试方法面临着严重的挑战。
This paper introduces the mechanism of power bus noise generation in a CMOS VLSI chip and the effect on normal circuit operation.
摘 要 本文介绍了CMOS VLSI芯片中电源总线噪声产生机理和对电路正常操作的影响。
Random test generation technology is one of the most important methods for the verification of modern VLSI.
随机测试生成技术是当今大规模集成电路仿真验证流程中的一项重要支撑技术。
The characteristic model of interconnects in VLSI is proposed.
本文提出了大规模集成电路中互连线的特征模型。
Finally, the circuit model is simulated by XILINX ISE 5.2, and the simulation result is correct. Reed-Solomon code; Galois field; multiplier; polynomial basis; normal basis; VHDL
正则基下的乘法器运算方便，便于VLSI电路的实现。2自然基下有限域元素的表示方法本原多项式f=x4+x3+1定义了一个GF(24)有限域
In this paper, a multi-capture composition based on real time image is analyzed and a practical solution is proposed.
针对实时在片控制提出一种多次采样组合的VLSI实现方法。
One of prospective developing directions of VLSI implementation is low-voltage, low-power analog circuit.
近几年来在这一发展方向上出现的处理技术首推瞬时缩展技术。
Instantaneous companding circuit, namely, Log-domain circuit, is the key technique used by international academia to develop the low-voltage and low-power analog VLSI in recent years.
瞬时缩展电路又称对数域电路，是近些年来国际学术界用来发展低电压低功率模拟VLSI的一个重要关键技术。
In today's VLSI designs, the growing of crosstalk effects causing chips to fail or suffer from low yields has become the important issue.
在现今的超大型积体电路的设计中，随之成长的杂讯干扰现象而造成晶片失败或良率降低，已变成很重要的课题。
The main objective of this project is to research and develop a novel and high efficient video codec framework based on wavelet techniques, especially to address the heterogeneousness of video networks, the fluctuation of transmission bandwidth and the diversity of video-stream receivers. The system will have some basic characteristics of the next video coding standard, such as high compression efficiency, high scalability and high error resiliency. This project will provide a software prototype of wavelet video codec with full scalability, construct a verification platform for wavelet video on demand service, and furthermore, design some VLSI IP cores of the key module in the codec system
本项目研究的主要目的就是着眼于下一代视频编解码标准的基本特征（高效压缩，高可伸缩，高容错），以小波技术为核心构建新型高效的视频编解码系统；特别针对当前视频传输网络的异构性，网络带宽的波动性以及用户视频接收终端的多样性，实现一个码流高度可伸缩同时兼顾压缩效率的小波视频编解码软件原型，并且构建基于异构IP网络的小波视频服务的技术验证平台；进一步还将基于VLSI技术，对小波视频编解码系统的关键模块进行IP核设计
For VLSI, a plane surface may be approximated by depositing the interlevel dielevtric by bias-sputter deposition (see Section 9.2.4) or by using planarization.
对于超大规模集成电路的平面状表面，可以用偏置溅射淀积法的层间介质淀积（见9.2.4节）或用平面化工艺来近似获得。
OBDD(Ordered Binary Decision Diagram) is widely used in formal verification and VLSI automatic test pattern generation.
编序的二元判决图在电路测试和逻辑验证等方面具有广泛的应用。
It is difficult for traditional voltage-diagnosis method to detect all kinds of faults under current IC production art condition, moreover, with the progress of the VLSI, the pin number of a chip is comparatively limited that it is hard to detect the redundant fault in the chip.
传统的故障电压诊断方法对于目前的生成工艺下的故障类型并不能有效的实现故障诊断，且大规模电路中包含冗余电路，很多冗余故障是无法检测的。
With the advent of portable devices, power consumption becomes one of most important considerations in the VLSI designs.
随著携带式设备的出现，功率消耗变成在VLSI设计上重要的考量之一。
Furthermore, a novel VLSI architecture of motion estimator is proposed, based on hierarchical search algorithm and FSBM systolic array.
理论分析和实验结果表明，三种FSBM脉动阵列能够以较低的资源消耗满足中低分辨率格式视频的实时运动估计要求。
Two main aspects in VLSI testing, fault simulation and test generation, are researched in this dissertation.
本文对VLSI测试中的两个主要问题—故障模拟和测试产生进行了深入的分析和研究。
This paper improved the estimation accuracy for power and area costs of combinational circuits at the behavioral design level with transition information entropy.
2基于信息熵的复杂度分析方法是在 VLSI 设计流程的高层次抽象阶段对组合逻辑电路功耗和面积进行分析估计的可行方法之一。