The automatic verilog code generate program is written in C/C++ language. This program can generate all the required modules of the 8-bit RISC micro-controller. We use this program to generate a PIC16C6X verilog code for testing. During the debugging stage, some fine tune of the automatically generated verilog code is still required.
自动微控制器产生器是用C/C++语言来撰写，在这个程式里能够产生8-bit RISC微控制器所需要的模组，我们将利用此程式来产生出PIC16C6X微控制器的verilog code来验证测试，在经过细步调整和侦错无误后续接FPGA的验证，更进一步的可以Cell Based的方式将晶片实现出来，完成一个8bit RISC微控制器。
Use the TSMC 0.13um process to do synthesis analysis. Under same performance, the register file area of composite FU is 10% more than RISC and 50% less than VLIW.
使用台积电0.13um制程作合成分析，在同样的运算效能下，复杂运算单元较简化指令集合的面积约多10%，但较超长指令减少约50%。
In this thesis, the whole design flow of the audio decoder for DTV is described:coding with full precision first, then fix-point transfer with limited precision. Then the ARMulator software simulation based on ARM920T core and the real-time decode design on the development board based on Samsung S3C2410 (ARM920T Core) are described in detail.
本文在正式介绍基于ARM920T RISC核的音频解码设计之前，先完整地介绍了数字电视音频解码的设计流程：先全精度描述音频解码算法；再对其进行有限精度的定点化改造；然后重点描述了音频解码的基于ARM920T Core的ARMulator软件仿真策略，以及基于Samsung S3C2410(ARM920T Core)的开发板的移植方法。
It wasn't the first RISC workstation. It wasn't even the first SPARC based Sun system.
它不是第一台 RISC工作站，也不是基于 SUN系统的第一台 SPARC产品。
RNA interference, a conserved evolutionary mechanism widely found in living nature, is considered for defending the alien gene and virus infection.
RNA干扰（RNA interference，RNAi）是生物界普遍存在的一种抵御外来基因和病毒感染的保守进化机制，其本质是siRNA与靶向mRNA特异结合、并由RISC介导其降解，从而阻止mRNA的翻译，导致基因沉默。
And functional verification of RISC puts in practice from kinds of aspects, such as structure, instruction channels, data path, and implement of circuit.
验证最关键的是测试方案的制定，而功能验证的过程是在于在设计过程中实施RTL级仿真、门级仿真和后仿真。
RISC/DSP pipeline partition rules are given based on the relations between instruction set and data path design.
根据MD32 RISC/DSP指令构成模型，确定MD32微结构模块组成，并提出RISC/DSP流水划分原则。
It used the RISC technology and owned the character of simple addressing method, large register and fixed length instruction. All of this make it process quickly and efficiently.
它采用了RISC技术，具有寻址方式简单，寄存器多，指令长度固定等特点，使得它的处理速度快，执行效率高。
This is why limiting ourselves to using only RISC data managers is so important: we no longer need to aim for the most comprehensive, elusive performance model, and there is hope that we can get a handle on how to auto-tune an individual data server component.
这就是为什么只局限于使用的RISC数据管理是那么重要：我们不再需要为宗旨的最全面的、难以捉摸的表现模式并希望我们能有一个如何处理自动调个人数据服务器组成。
RISC mica material for heating equipment is a kind of hard plate-like insulates made of first-rate mica paper mixed with proper adhesive after pressed and bake. It has high mechanical strength and good property of heating resistance. It can be within 600℃ for a long time.
电热设备用粉云母板是我厂选用国内优质白粉云母纸配以适当的胶粘剂经烘焙压制而成的硬质板状绝缘材料，它具有较高的机械强度和良好的耐热性能，在600℃内可长期使用。
The selected MCU core is the PIC16C54, Which one kind of the Microchips PIC16C5X series, this kind of 8 bit series have many merit, it mainly include the wide byte and single cycle, and Harvard-double-bus, and RISC structure.
所选用的MCU核是Microchip公司的PIC16C5X系列中的16C54，该系列8位MCU具有很多的优点，主要体现在宽字节单周期指令、哈佛双总线和RISC结构。
Ontrast with RISC.
ISC 处理器一般产生变长的指令，多种地址格式，并且仅仅有少量的通用寄存器。
The mode of network computing makes the computing resource being more and more shared.
1引言随着RISC技术、网络技术和并行编程环境的发展，基于网络的并行计算系统，正成为当前研究的热点。
The development of RISC and superscalar techniques offers a new way to cache optimization.
而RISC和超标量等技术的引入为
Embedded systems are new fields of computer applications.
RISC与DSP的结构比较及在嵌入式应用中的方案选择韩纪庆，王承发，马小强（哈尔滨工业大学计算机系，150006）摘要嵌入式系统是计算机新的应用领域。
A RISC microprocessor is developed by using modular design method and VHDL language based on FPGA and EDA technology.
基于FPGA和电子设计自动化技术，采用模块化设计的方法和VHDL语言，设计一个基于FPGA的RISC微处理器。
This cell can be built as a standard cell to improve the VLSI design. Chapter 5 studies the design of pipe-line structure and interrupt system, introduces the model of control unit and the algorithm of instruction set using in the special-purpose 32-bit floating-point CMOS RISC MPU.
在流水线设计中采用了三级指令流水线，并采用延迟转移技术；中断设计中针对嵌入式系统的实时性要求高的特点，采用了PC链技术及流水线冲刷技术，使系统的最小延迟时间只有一个机器周期。
UNICORE is a RISC microprocessor designed by Microprocessor Research and Development Center of Peking University, and has been silicon proven.
UNICORE〓是由北京大学微处理器研究开发中心研制的一款RISC风格的微处理器，目前已经实际应用于北大众志〓网络计算机系统中。
MIPS regards RISC as typical delegate of the system, indispensable code density is mixed not high of instruction region use the blemish with low rate effectively, make program volume expands.
梗概：MIPS作为RISC体系的典型代表，不能避免代码密度不高和指令域的有效利用程度低的缺陷，使得程序体积膨胀。
It has the merits of architecture of both large computer and superminicomputer, and adopts the new architectures of Harvard, RISC and multiple-microprocessor etc.
它既引入了大型机及超级小型机体系结构的优点，又选用了哈佛、RISC及多微处理器等新型体系结构。