Once we can build an inverter, building an AND gate is easy just invert the outputof a NAND gate.
一旦我们可以建立一个转换，建立一个AND是很简单的，只需要转换NAND的输出。
To prove that we can construct any boolean function using only NAND gates, we needonly show how to build an inverter, AND gate, and OR gate from a NAND (sincewe can create any boolean function using only AND, NOT, and OR).
为了证明使用NAND门我们能够构造任何布尔函数，我们只需要展示如何从一个NAND建立一个转换，与门，或门（因为我们可以用AND，OR，NOT建立任何布尔函数）。
Page 32. There are several logic gate configurations, among them the AND gate, NAND gate, OR gate, NOR gate, EXCLUSIVE OR gate and EXCLUSIVE NOR gate.
有几种逻辑门配置，其中包括：与门，非门，或门，或非门、与非门、异或门和同或门。
In the model design of protection unit, we realize easy and reliable circuit of protection and checkout with the help of the CPLD technology, and realize the latching circuit with the NAND gate. All these are to avoid the wrong action during the real operation.
在模板的保护单元设计中，在复杂可编程逻辑电路中设计了一种简单可靠的保护校验电路，外加与非门实现的闭锁电路，确保在实际运行中不会产生误动作。
One new usage of the RC integrated circuit is proposed, which uses the RC integrated circuit and the NAND gate to form a timing control switch together, thus realizes the design of guarding against unusually triggers of the ve.
针对这3种情况，对相应电路进行了改进，提出了RC积分电路的一种新的用法，使用RC积分电路和与非门一起形成一个延时控制开关，从而实现了车辆检测器的防非正常触发设计。
After all, NOT NOT (A AND B is equivalent to A AND B. Ofcourse, this takes two NAND gates to construct a single AND gate, but no one said that
毕竟NAND就是NOT AND，当然这是利用2个NAND门建立一个AND门的，但是没有人说
Using two trigger sections produces a NAND gate, the output of which depends on the presence or absence of two input proteins.
使用两个触发器片断可以做成一个与非门，输出（比如：是否停止制造荧光蛋白）取决于两种输入蛋白是否同时存在或者同时不存在。
The NAND gate is exactly the same configuration as the NOR function!
在与非门的功能是完全一样的NOR的配置了！
The difference between the NOR and OR gate, on the one hand, and the NAND or AND gate, on the other, is to be noted.
为了减少代码在传输、接受以及其他处理过程中出现的错误，可以利用奇偶校验法来检查错误。
This program alone reduced prices on quad nand gate ICs from $1000/each to $3/each, permitting their use in commercial products.
这一计划降低价格仅基于NAND门电路四方1000/each元3/each元，允许他们在商业用途的产品。
Pulse width generator 404 delays the output signal VIN of NAND gate 403 to generate an output signal VOUT.
脉冲宽度发生器404延迟NAND门403的输出信号VIN从而生成输出信号VOUT。
Inverters 505 and 506 are coupled together in series between NAND gate 403 at VIN and a second input of multiplexer 510 to form a second delay path.
反相器505和506在NAND门403的VIN和乘法器510的第二输入端之间串联耦合到一起从而形成第二延迟路径。
NAND gate both connect to the sam output and can therefore occupy the same well.
到同一个输出端，因此能共用一个阱。
After the UP and DN signals transition to a logic low, NAND gate 403 generates a rising edge in VIN, and pulse width generator 404 generates a rising edge in VOUT a delayed period of time later.
在UP和DN信号转换到逻辑低电平后，NAND门403在VIN中生成上升沿，且脉冲宽度发生器404在延迟时间段后在VOUT中生成上升沿。
NAND gate 403 is a logic gate that performs a NAND Boolean logic function on the UP and DN signals to generate a voltage signal VIN.
NAND门403是对UP和DN信号执行NAND布尔逻辑功能以生成电压信号VIN的逻辑门。
He added that it also plans to develop its charge trap flash (CTF) technology, a replacement option for the current mainstream floating-gate NAND technology.
他并表示镁光也计划开发自己的电荷捕获型（chargetrapflash（CTF））闪存技术，以取代现有的浮栅型（floating-gate）NAND闪存技术。
According to the idea of gate freezing, the designs of the logic cells: F-Nand-gate and F-Nor-gate are presented, and then a new kind of RS flip-flop based on F-Gates is proposed.
利用门冻结技术的基本原理，提出了基于F门的逻辑单元电路设计：F-与非门和F-或非门，并将其应用到一种新的RS触发器中。
Much the same as the procedure for making a NOR gate behave as a NAND, we must invert all inputs and the output to make a NAND gate function as a NOR.
大致相同的程序让或非门表现为一个与非门，我们必须颠倒所有输和输出，使一个与非门的作为或非门。
Discussion on the Input Load Resistance Characteristic of the TTL Nand Gate
对TTL与非门输入负载电阻特性的讨论
To Ameliorate Scanning Admeasuring Voltage Transmission Characteristic of TTL NAND Gate
TTL与非门电压传输特性实验的改进